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Disambiguation of "Chu, Michael"

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A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme.

, , , , , , , , and . FPGA, page 248. ACM, (2003)

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Anh Chu University of Stuttgart

Xu Chu

Dr. -Ing. Xu Chu University of Stuttgart

Phi-Long Chung University of Stuttgart

Michael Böhm

 

Other publications of authors with the same name

Object Oriented Circuit-Generators in Java., , , , and . FCCM, page 158-166. IEEE Computer Society, (1998)A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration., , , , , and . IEEE Trans. VLSI Syst., 18 (6): 967-977 (2010)A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block., , , , , , , and . Microprocessors and Microsystems, 29 (2-3): 121-131 (2005)Correction to Ä 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology"., , , , , and . J. Solid-State Circuits, 45 (10): 2210 (2010)High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology., , , , , , , , , and . Proceedings of the IEEE, 103 (7): 1181-1196 (2015)A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC., , , , , , , , and . Integration, 38 (3): 525-540 (2005)Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications., , , , , and . IET Circuits, Devices & Systems, 5 (3): 159-169 (2011)Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine., , , , , , and . FPGA, page 196-205. ACM, (2002)Stream Computations Organized for Reconfigurable Execution (SCORE)., , , , , and . FPL, volume 1896 of Lecture Notes in Computer Science, page 605-614. Springer, (2000)A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology., , , , , and . ACM Great Lakes Symposium on VLSI, page 37-40. ACM, (2003)