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Stream Computations Organized for Reconfigurable Execution (SCORE).

E. Caspi, M. Chu, R. Huang, J. Yeh, J. Wawrzynek, and A. DeHon. FPL, volume 1896 of Lecture Notes in Computer Science, page 605-614. Springer, (2000)

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André Jaquemod University of Stuttgart

Univ. -Prof. Dr. André Bächtiger University of Stuttgart

Reducing Social Stratification Bias in Referendum Participation : Evidence from the German Local LevelJ. Velimsky, A. Vetter, and A. Bächtiger. Political research quarterly, (2024)

Univ. -Prof. Dr. rer. nat. André Thess University of Stuttgart

Dr. -Ing. André Buchau University of Stuttgart

André Weiß University of Stuttgart

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Stochastic spatial routing for reconfigurable networks.A. DeHon, R. Huang, and J. Wawrzynek. Microprocessors and Microsystems, 30 (6): 301-318 (2006)Reconfigurable Computing Architectures.R. Tessier, K. Pocek, and A. DeHon. Proceedings of the IEEE, 103 (3): 332-354 (2015)Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices.K. Nomura, K. Abe, S. Fujita, and A. DeHon. Nano-Net, page 1-5. IEEE, (2006)Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation.A. DeHon, and K. Likharev. ICCAD, page 375-382. IEEE Computer Society, (2005)Hardware-Assisted Fast Routing.A. DeHon, R. Huang, and J. Wawrzynek. FCCM, page 205-. IEEE Computer Society, (2002)Kung Fu Data Energy - Minimizing Communication Energy in FPGA Computations.E. Kadric, K. Mahajan, and A. DeHon. FCCM, page 214-221. IEEE Computer Society, (2014)Pipelining Saturated Accumulation.K. Papadantonakis, N. Kapre, S. Chan, and A. DeHon. FPT, page 19-26. IEEE, (2005)Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors.N. Kapre, and A. DeHon. FPL, page 65-72. IEEE, (2009)Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP).H. Giesen, B. Gojman, R. Rubin, J. Kim, and A. DeHon. TRETS, 11 (1): 3:1-3:23 (2018)Inversion schemes for sublithographic programmable logic arrays.B. Gojman, H. Manem, G. Rose, and A. DeHon. IET Computers & Digital Techniques, 3 (6): 625-642 (2009)