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Disambiguation of "O'Connor, Ian"

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Automated synthesis of current-memory cells.

, and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (4): 413-424 (2000)

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Jun. -Prof. Dr. Andrea Iannelli University of Stuttgart

Dr. Ana Lacrimioara Iancu University of Stuttgart

 

Other publications of authors with the same name

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics., , , , , , and . ICECS, page 66-69. IEEE, (2010)Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme., , , , and . ICECS, page 888-891. IEEE, (2009)Optical look up table., , , , and . DATE, page 873-876. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Reduction methods for adapting optical network on chip topologies to 3D architectures., , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 37 (1): 87-98 (2013)Heterogeneous Modelling of an Optical Network-on-Chip with SystemC., , , , , and . IEEE International Workshop on Rapid System Prototyping, page 10-16. IEEE Computer Society, (2005)Automated synthesis of current-memory cells., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 19 (4): 413-424 (2000)Interconnection scheme and associated mapping method of reconfigurable cell matrices based on nanoscale devices., , , and . NANOARCH, page 69-74. IEEE Computer Society, (2009)Reducing transistor count in clocked standard cells with ambipolar double-gate FETs., , , , , and . NANOARCH, page 47-52. IEEE Computer Society, (2010)Foreword., , , and . VLSI-SoC, page 1. IEEE, (2016)Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques., , and . IEEE Trans. Multi-Scale Computing Systems, 4 (2): 97-98 (2018)