PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ziener, Daniel"

Author of the publication

copydeleteadd this publication to your clipboard
An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only).

, , and . FPGA, page 257. ACM, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Daniel Marino

Daniel Roth

Daniel Roth

Daniel Roth

Daniel Roth

 

Other publications of authors with the same name

Symbolic system-level design methodology for multi-mode reconfigurable systems., , , and . Design Autom. for Emb. Sys., 17 (2): 343-375 (2013)Power Signature Watermarking of IP Cores for FPGAs., and . Signal Processing Systems, 51 (1): 123-136 (2008)Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems.. CoRR, (2018)Partial Reconfiguration on FPGAs in Practice - Tools and Applications., , , , , , , , and . ARCS Workshops, volume P-200 of LNI, page 297-319. GI, (2012)Netlist-level IP protection by watermarking for LUT-based FPGAs., , and . FPT, page 209-216. IEEE, (2008)Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs., and . IJAACS, 2 (3): 256-275 (2009)FPGA-Based Dynamically Reconfigurable SQL Query Processing., , , , , , , , and . TRETS, 9 (4): 25:1-25:24 (2016)Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs.. University of Erlangen-Nuremberg, (2010)Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning., , , and . CoRR, (2017)Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)., , and . CoRR, (2015)