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%0 Journal Article
%1 journals/vlsisp/ZienerT08
%A Ziener, Daniel
%A Teich, Jürgen
%D 2008
%J Signal Processing Systems
%K dblp
%N 1
%P 123-136
%T Power Signature Watermarking of IP Cores for FPGAs.
%U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp51.html#ZienerT08
%V 51
@article{journals/vlsisp/ZienerT08,
added-at = {2008-07-15T00:00:00.000+0200},
author = {Ziener, Daniel and Teich, Jürgen},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2e54d3b70fcead5eb2706a3ce500b95bf/dblp},
ee = {http://dx.doi.org/10.1007/s11265-007-0136-8},
interhash = {ac94f37fed439a94b0445c27da4fa3e8},
intrahash = {e54d3b70fcead5eb2706a3ce500b95bf},
journal = {Signal Processing Systems},
keywords = {dblp},
number = 1,
pages = {123-136},
timestamp = {2016-02-02T09:52:56.000+0100},
title = {Power Signature Watermarking of IP Cores for FPGAs.},
url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp51.html#ZienerT08},
volume = 51,
year = 2008
}
