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Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.

C. You, J. Guo, R. Kraft, M. Chu, R. Heikaus, O. Erdogan, P. Curran, B. Goda, K. Zhou, and J. McDonald. FPL, volume 2778 of Lecture Notes in Computer Science, page 11-20. Springer, (2003)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Anh Chu University of Stuttgart

Xu Chu

Dr. -Ing. Xu Chu University of Stuttgart

Phi-Long Chung University of Stuttgart

Michael Böhm

Other publications of authors with the same name

A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration.A. Zia, P. Jacob, J. Kim, M. Chu, R. Kraft, and J. McDonald. IEEE Trans. VLSI Syst., 18 (6): 967-977 (2010)Object Oriented Circuit-Generators in Java.M. Chu, N. Weaver, K. Sulimma, A. DeHon, and J. Wawrzynek. FCCM, page 158-166. IEEE Computer Society, (1998)High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology.M. LeRoy, S. Raman, M. Chu, J. Kim, J. Guo, K. Zhou, C. You, R. Clarke, B. Goda, and J. McDonald. Proceedings of the IEEE, 103 (7): 1181-1196 (2015)Correction to Ä 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology".M. Chu, P. Jacob, J. Kim, M. LeRoy, R. Kraft, and J. McDonald. J. Solid-State Circuits, 45 (10): 2210 (2010)A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block.C. You, J. Guo, R. Kraft, M. Chu, P. Curran, K. Zhou, B. Goda, and J. McDonald. Microprocessors and Microsystems, 29 (2-3): 121-131 (2005)A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC.J. Guo, C. You, K. Zhou, M. Chu, P. Curran, J. Diao, B. Goda, R. Kraft, and J. McDonald. Integration, 38 (3): 525-540 (2005)Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications.J. Kim, M. Chu, P. Jacob, A. Zia, R. Kraft, and J. McDonald. IET Circuits, Devices & Systems, 5 (3): 159-169 (2011)A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology.C. You, J. Guo, R. Kraft, K. Zhou, M. Chu, and J. McDonald. ACM Great Lakes Symposium on VLSI, page 37-40. ACM, (2003)Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine.Y. Markovsky, E. Caspi, R. Huang, J. Yeh, M. Chu, J. Wawrzynek, and A. DeHon. FPGA, page 196-205. ACM, (2002)Stream Computations Organized for Reconfigurable Execution (SCORE).E. Caspi, M. Chu, R. Huang, J. Yeh, J. Wawrzynek, and A. DeHon. FPL, volume 1896 of Lecture Notes in Computer Science, page 605-614. Springer, (2000)

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Disambiguation of "Chu, Michael"

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Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.

Please choose a person to relate this publication to

Anh Chu University of Stuttgart

Xu Chu

Dr. -Ing. Xu Chu University of Stuttgart

Phi-Long Chung University of Stuttgart

Michael Böhm

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Chu, Michael"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.

Please choose a person to relate this publication to

Anh Chu University of Stuttgart

Xu Chu

Dr. -Ing. Xu Chu University of Stuttgart

Phi-Long Chung University of Stuttgart

Michael Böhm

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.