PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Chakrabarty, Krishnendu"

Author of the publication

copydeleteadd this publication to your clipboard
Exploring the Mysteries of System-Level Test

, , , , , , , , , and . CoRR, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Chakrabarty, Krishnendu
add a person with the name Chakrabarty, Krishnendu
 

Other publications of authors with the same name

Test Resource Partitioning for SOCs., and . IEEE Design & Test of Computers, 18 (5): 80-91 (2001)Looking ahead at the role of electronic design automation in synthetic biology From the EIC.. IEEE Design & Test of Computers, 29 (3): 4 (2012)On a New Class of Codes for Identifying Vertices in Graphs., , and . IEEE Trans. Information Theory, 44 (2): 599-611 (1998)Test-time optimization in NOC-based manycore SOCs using multicast routing., and . VTS, page 1-6. IEEE Computer Society, (2014)Cumulative balance testing of logic circuits., and . IEEE Trans. VLSI Syst., 3 (1): 72-83 (1995)SOC test planning using virtual test access architectures., , and . IEEE Trans. VLSI Syst., 12 (12): 1263-1276 (2004)Design and analysis of compact dictionaries for diagnosis in scan-BIST., and . IEEE Trans. VLSI Syst., 13 (8): 979-984 (2005)Accurate Predictions of Process-Execution Time and Process Status Based on Support-Vector Regression for Enterprise Information Systems., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (3): 354-366 (2015)Test set embedding for deterministic BIST using a reconfigurable interconnection network., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 23 (9): 1289-1305 (2004)A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (7): 1192-1205 (2016)