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Disambiguation of "Kim, Keunwoo"

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Technology-circuit co-design of asymmetric SRAM cells for read stability improvement.

, , and . CICC, page 1-4. IEEE, (2010)

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Kim Meliani University of Stuttgart

Joel Kimmich University of Stuttgart

Do Yeon Kim University of Stuttgart

Dr. Wolfgang Kimmerle University of Stuttgart

Dr. -Ing. Kim Riedmüller University of Stuttgart

 

Other publications of authors with the same name

Modeling and Analysis of Leakage Currents in Double-Gate Technologies., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (10): 2052-2061 (2006)A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies., , , , and . ISLPED, page 8-13. ACM, (2007)Adaptive Beam Design for V2I Communications Using Vehicle Tracking With Extended Kalman Filter., , , , and . IEEE Trans. Veh. Technol., 71 (1): 489-502 (2022)Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits., , , and . ISQED, page 153-158. IEEE Computer Society, (2003)Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits., , , and . ISLPED, page 8-13. ACM, (2005)Strained-si devices and circuits for low-power applications., , and . ISLPED, page 180-183. ACM, (2003)Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI., , , and . ISQED, page 145-152. IEEE Computer Society, (2007)Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices., , , , , , and . Microelectronics Journal, 38 (8-9): 931-941 (2007)Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction., , , , , , , , , and 2 other author(s). IEEE Trans. VLSI Syst., 23 (3): 534-543 (2015)Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies., , , , , and . IEEE Trans. VLSI Syst., 16 (12): 1657-1665 (2008)