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Disambiguation of "Joshi, Rajiv V."

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Strained-si devices and circuits for low-power applications.

, , and . ISLPED, page 180-183. ACM, (2003)

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V. Vaikuntanathan

Jasmin Joshi-Thompson University of Stuttgart

V. Zaverkin

Michael P. Voigt

Wolfgang Vogel

 

Other publications of authors with the same name

Robust bias temperature instability refresh design and methodology for memory cell recovery., , , , and . ICICDT, page 1-4. IEEE, (2014)14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation., , , , and . VLSIC, page 268-. IEEE, (2015)Efficient analog circuit optimization using sparse regression and error margining., , , , and . ISQED, page 410-415. IEEE, (2016)Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices., , , , , , and . Microelectronics Journal, 38 (8-9): 931-941 (2007)Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations., , , , and . ISPASS, page 153-154. IEEE Computer Society, (2016)Distributed In-Memory Computing on Binary RRAM Crossbar., , , , and . JETC, 13 (3): 36:1-36:18 (2017)Design technology co-optimization for 10 nm and beyond., and . CICC, page 1. IEEE, (2014)Design Considerations and Implementation of a High Performance Dynamic Register File., and . VLSI Design, page 526-531. IEEE Computer Society, (1999)Design Of Provably Correct Storage Arrays., , and . VLSI Design, page 196-. IEEE Computer Society, (2001)"Cool low power" 1GHz multi-port register file and dynamic latch in 1.8 V, 0.25 mum SOI and bulk technology (poster session)., , , and . ISLPED, page 203-206. ACM, (2000)