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Disambiguation of "Ziener, Daniel"

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Stress-Aware Module Placement on Reconfigurable Devices.

, , , and . FPL, page 277-281. IEEE Computer Society, (2011)

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Univ. -Prof. Dr. Daniel Weiskopf University of Stuttgart

Dataset for NMF-based Analysis of Mobile Eye-Tracking Data, , , and . Dataset, (2024)Related to: Daniel Klötzl, Tim Krake, Frank Heyen, Michael Becher, Maurice Koch, Daniel Weiskopf, and Kuno Kurzhals. 2024. NMF-Based Analysis of Mobile Eye-Tracking Data. In 2024 Symposium on Eye Tracking Research and Applications (ETRA ’24), June 4-7, 2024, Glasgow, United Kingdom. ACM, New York, NY, USA, 9 pages. doi: 10.1145/3649902.3653518.
Dataset for NMF-based Analysis of Mobile Eye-Tracking Data, , , and . Dataset, (2024)Related to: Daniel Klötzl, Tim Krake, Frank Heyen, Michael Becher, Maurice Koch, Daniel Weiskopf, and Kuno Kurzhals. 2024. NMF-Based Analysis of Mobile Eye-Tracking Data. In 2024 Symposium on Eye Tracking Research and Applications (ETRA ’24), June 4-7, 2024, Glasgow, United Kingdom. ACM, New York, NY, USA, 9 pages. doi: 10.1145/3649902.3653518.Visual Analysis System to Explore the Visual Quality of Multidimensional Time Series Projections, and . Software, (2024)Related to: T. Munz-Körner, D. Weiskopf, Exploring visual quality of multidimensional time series projections, Visual Informatics (2024). doi: 10.1016/j.visinf.2024.04.004.Supplemental Material for "Exploring Visual Quality of Multidimensional Time Series Projections", and . Dataset, (2024)Related to: T. Munz-Körner, D. Weiskopf, Exploring visual quality of multidimensional time series projections, Visual Informatics (2024). doi: 10.1016/j.visinf.2024.04.004.

Daniel Marino

Daniel Roth

Daniel Roth

Daniel Roth

 

Other publications of authors with the same name

Symbolic system-level design methodology for multi-mode reconfigurable systems., , , and . Design Autom. for Emb. Sys., 17 (2): 343-375 (2013)Power Signature Watermarking of IP Cores for FPGAs., and . Signal Processing Systems, 51 (1): 123-136 (2008)Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems.. CoRR, (2018)Partial Reconfiguration on FPGAs in Practice - Tools and Applications., , , , , , , , and . ARCS Workshops, volume P-200 of LNI, page 297-319. GI, (2012)Netlist-level IP protection by watermarking for LUT-based FPGAs., , and . FPT, page 209-216. IEEE, (2008)FPGA-Based Dynamically Reconfigurable SQL Query Processing., , , , , , , , and . TRETS, 9 (4): 25:1-25:24 (2016)Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning., , , and . CoRR, (2017)Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)., , and . CoRR, (2015)A Flexible FPGA-Based Inference Architecture for Pruned Deep Neural Networks., and . ARCS, volume 10793 of Lecture Notes in Computer Science, page 311-323. Springer, (2018)Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs., and . IJAACS, 2 (3): 256-275 (2009)