Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Diken, Erkan
add a person with the name Diken, Erkan
 

Other publications of authors with the same name

A Middleware Approach to Achieving Fault Tolerance of Kahn Process Networks on Networks on Chips., , and . Int. J. Reconfig. Comp., (2011)A configurable SIMD architecture with explicit datapath for intelligent learning., , , , , , , and . SAMOS, page 156-163. IEEE, (2016)Construction and exploitation of VLIW ASIPs with heterogeneous vector-widths., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 38 (8): 947-959 (2014)BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching., , , and . DDECS, page 83-88. IEEE Computer Society, (2014)ASAM: Automatic Architecture Synthesis and Application Mapping., , , , , , , , , and 3 other author(s). DSD, page 216-225. IEEE Computer Society, (2012)Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study., , , and . DSD, page 774-781. IEEE Computer Society, (2012)Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths., , , , , and . ASAP, page 181-188. IEEE Computer Society, (2015)ASAM: Automatic architecture synthesis and application mapping., , , , , , , , , and 4 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-C): 1002-1019 (2013)An Access-Pattern-Aware On-Chip Vector Memory System with Automatic Loading for SIMD Architectures., , , , and . HPEC, page 1-7. IEEE, (2018)