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Disambiguation of "Corporaal, Henk"

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Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths.

, , , , , and . ASAP, page 181-188. IEEE Computer Society, (2015)

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Johanna Henkel-Waidhofer University of Stuttgart

Univ. -Prof. Dr. Anne Elisabeth Henke University of Stuttgart

 

Other publications of authors with the same name

Link-time effective whole-program optimizations., and . Future Generation Comp. Syst., 16 (5): 503-511 (2000)A Unified Model for Analysis of Real-Time Properties., , and . ISoLA (Preliminary proceedings), volume TR-2004-6 of Technical Report, page 220-226. Department of Computer Science, University of Cyprus, (2004)Construction and exploitation of VLIW ASIPs with heterogeneous vector-widths., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 38 (8): 947-959 (2014)ADVISE: Performance Evaluation of Parallel VHDL Simulation., and . Annual Simulation Symposium, page 146-156. IEEE Computer Society, (1997)Predictable real-time software synthesis., , and . Real-Time Systems, 36 (3): 159-198 (2007)An Efficient Method for Energy Estimation of Application Specific Instruction-Set Processors., , , and . DSD, page 471-474. IEEE Computer Society, (2013)Very wide register: an asymmetric register file organization for low power embedded processors., , , , , and . DATE, page 1066-1071. EDA Consortium, San Jose, CA, USA, (2007)Automated extraction of scenario sequences from disciplined dataflow networks., , , , and . MEMOCODE, page 47-56. IEEE, (2013)Strengthening Property Preservation in Concurrent Real-Time Systems., , , and . RTCSA, page 106-109. IEEE Computer Society, (2006)BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching., , , and . DDECS, page 83-88. IEEE Computer Society, (2014)