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Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)

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Automatic Synthesis of Self-Recovering VLSI Systems., and . IEEE Trans. Computers, 45 (2): 131-142 (1996)Guest Editors' Introduction: Online VLSI Testing., and . IEEE Design & Test of Computers, 15 (4): 12-16 (1998)Configurable Spare Processors: A New Approach to System Level-Fault Tolerance., , and . DFT, page 295-303. IEEE Computer Society, (1996)Towards Secure Analog Designs: A Secure Sense Amplifier Using Memristors., , and . ISVLSI, page 516-521. IEEE Computer Society, (2014)Simulated annealing based yield enhancement of layouts., and . Great Lakes Symposium on VLSI, page 166-169. IEEE, (1994)A Primer on Hardware Security: Models, Methods, and Metrics., , and . Proceedings of the IEEE, 102 (8): 1283-1295 (2014)Regaining Trust in VLSI Design: Design-for-Trust Techniques., , and . Proceedings of the IEEE, 102 (8): 1266-1282 (2014)A study on the effectiveness of Trojan detection techniques using a red team blue team approach., , , , and . VTS, page 1-3. IEEE Computer Society, (2013)Hardware security: threat models and metrics., , , and . ICCAD, page 819-823. IEEE, (2013)Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs., , and . DATE, page 865-869. EDA Consortium, San Jose, CA, USA, (2007)