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Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)

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Reliable NoC architecture utilizing a robust rerouting algorithm., , , , and . EWDTS, page 200-203. IEEE Computer Society, (2008)Impact of Aging on Template Attacks., , and . ACM Great Lakes Symposium on VLSI, page 455-458. ACM, (2018)Exploring the Effect of Device Aging on Static Power Analysis Attacks., , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019 (3): 233-256 (2019)Special Session: Countering IP Security threats in Supply chain., , , , , and . VTS, page 1-9. IEEE, (2019)Design-Based Fingerprinting Using Side-Channel Power Analysis for Protection Against IC Piracy., , , and . ISVLSI, page 614-619. IEEE Computer Society, (2018)Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)Test generation for clock-domain crossing faults in integrated circuits., , , and . DATE, page 406-411. IEEE, (2012)Detection, Diagnosis, and Recovery From Clock-Domain Crossing Failures in Multiclock SoCs., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (9): 1395-1408 (2013)Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller., , , , and . IEEE Trans. Computers, 60 (9): 1260-1273 (2011)On the Effect of Aging in Detecting Hardware Trojan Horses with Template Analysis., , and . IOLTS, page 281-286. IEEE, (2018)