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Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)

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A hierarchical 3-D floorplanning algorithm for many-core CMP networks., and . ISCAS, page 1211-1214. IEEE, (2011)Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)Sneak-path Testing of Memristor-based Memories., , , and . VLSI Design, page 386-391. IEEE Computer Society, (2013)Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor Memories., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (5): 822-834 (2015)3D NOC for many-core processors., , , and . Microelectronics Journal, 42 (12): 1380-1390 (2011)Sneak path testing and fault modeling for multilevel memristor-based memories., , and . ICCD, page 215-220. IEEE Computer Society, (2013)Engineering crossbar based emerging memory technologies., , , and . ICCD, page 478-479. IEEE Computer Society, (2012)Detection, diagnosis, and repair of faults in memristor-based memories., , , and . VTS, page 1-6. IEEE Computer Society, (2014)Secure Memristor-based Main Memory., , and . DAC, page 178:1-178:6. ACM, (2014)