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JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories., , , , and . ISVLSI, page 149-154. IEEE Computer Society, (2015)A dynamically reconfigurable architecture for emergency and disaster management in ITS., , , , and . ICCVE, page 479-484. IEEE, (2014)Implications of non-volatile memory as primary storage for database management systems., , , , and . SAMOS, page 164-171. IEEE, (2016)Transactional Memory: An Overview., , , , , , and . IEEE Micro, 27 (3): 8-29 (2007)Runtime-Aware Architectures., , , , , , , , , and 3 other author(s). Euro-Par, volume 9233 of Lecture Notes in Computer Science, page 16-27. Springer, (2015)A Demo of FPGA Aggressive Voltage Downscaling: Power and Reliability Tradeoffs., , and . FPL, page 451-452. IEEE Computer Society, (2018)Stand-Alone Memory Controller for Graphics System., , , , , , and . ARC, volume 8405 of Lecture Notes in Computer Science, page 108-120. Springer, (2014)A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques., , , , , and . ISLPED, page 362-367. ACM, (2016)Designing and Modelling Selective Replication for Fault-tolerant HPC Applications., , , , and . CCGrid, page 452-457. IEEE Computer Society / ACM, (2017)A Deep Learning Mapper (DLM) for Scheduling on Heterogeneous Systems., , , , , , and . CARLA, volume 796 of Communications in Computer and Information Science, page 3-20. Springer, (2017)