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A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.

I. Ratkovic, O. Palomar, M. Stanic, O. Unsal, A. Cristal, and M. Valero. ISLPED, page 362-367. ACM, (2016)

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Prof. Dr. Oscar Gabriel University of Stuttgart

Other publications of authors with the same name

Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.O. Arcas-Abella, A. Armejach, T. Hayes, G. Malazgirt, O. Palomar, B. Salami, and N. Sönmez. Computing in Science and Engineering, 18 (1): 80-87 (2016)Towards low-power embedded vector processor.M. Stanic, O. Palomar, T. Hayes, I. Ratkovic, O. Unsal, and A. Cristal. Conf. Computing Frontiers, page 339-342. ACM, (2016)DiMP: Architectural Support for Direct Message Passing on Shared Memory Multi-cores.J. Gil, O. Palomar, O. Unsal, and A. Cristal. ICPP, page 130-139. IEEE Computer Society, (2015)Reusing cached schedules in an out-of-order processor with in-order issue logic.O. Palomar, T. Juan, and J. Navarro. ICCD, page 246-253. IEEE Computer Society, (2009)VPM: Virtual power meter tool for low-power many-core/heterogeneous data center prototypes.S. Rethinagiri, O. Palomar, J. Moreno, O. Unsal, and A. Cristal. ICCD, page 651-658. IEEE Computer Society, (2015)Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi.M. Stanic, O. Palomar, I. Ratkovic, M. Duric, O. Unsal, A. Cristal, and M. Valero. HPCS, page 47-54. IEEE, (2014)ViPS: Visual processing system for medical imaging.T. Hussain, O. Palomar, A. Cristal, E. Ayguadé, and A. Haider. BMEI, page 40-45. IEEE, (2015)Vector Extensions for Decision Support DBMS Acceleration.T. Hayes, O. Palomar, O. Unsal, A. Cristal, and M. Valero. MICRO, page 166-176. IEEE Computer Society, (2012)The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation.J. Mawer, O. Palomar, C. Gorgovan, A. Nisbet, W. Toms, and M. Luján. FCCM, page 144-151. IEEE Computer Society, (2017)PETS: Power and energy estimation tool at system-level.S. Rethinagiri, O. Palomar, O. Unsal, A. Cristal, R. Atitallah, and S. Niar. ISQED, page 535-542. IEEE, (2014)

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Disambiguation of "Palomar, Oscar"

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A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.

Please choose a person to relate this publication to

Prof. Dr. Oscar Gabriel University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Palomar, Oscar"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.

Please choose a person to relate this publication to

Prof. Dr. Oscar Gabriel University of Stuttgart

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
DIN 1505
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A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.