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Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.

O. Arcas-Abella, A. Armejach, T. Hayes, G. Malazgirt, O. Palomar, B. Salami, and N. Sönmez. Computing in Science and Engineering, 18 (1): 80-87 (2016)

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Application specific multi-port memory customization in FPGAs.G. Malazgirt, H. Yantir, A. Yurdakul, and S. Niar. FPL, page 1-4. IEEE, (2014)Customizing VLIW processors from dynamically profiled execution traces.G. Malazgirt, A. Yurdakul, and S. Niar. Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 656-673 (2015)High-Level verifiable data-path Synthesis for DSP systems.E. Culha, G. Malazgirt, I. Baskaya, A. Sen, and A. Yurdakul. SIU, page 1-4. IEEE, (2012)Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.O. Arcas-Abella, A. Armejach, T. Hayes, G. Malazgirt, O. Palomar, B. Salami, and N. Sönmez. Computing in Science and Engineering, 18 (1): 80-87 (2016)A Verifiable High Level Data Path Synthesis Framework.G. Malazgirt, E. Culha, A. Sen, I. Baskaya, and A. Yurdakul. DSD, page 397-404. IEEE Computer Society, (2012)Big Data and HPC Acceleration with Vivado HLS.M. Schmid, C. Schmitt, F. Hannig, G. Malazgirt, N. Sönmez, A. Yurdakul, and A. Cristal. FPGAs for Software Programmers, Springer, (2016)MIPT: Rapid exploration and evaluation for migrating sequential algorithms to multiprocessing systems with multi-port memories.G. Malazgirt, A. Yurdakul, and S. Niar. HPCS, page 776-783. IEEE, (2014)Exploring Embedded Symmetric Multiprocessing with Various On-Chip Architectures.G. Malazgirt, B. Kiyan, D. Candas, K. Erdayandi, and A. Yurdakul. EUC, page 1-8. IEEE Computer Society, (2015)AxleDB: A novel programmable query processing platform on FPGA.B. Salami, G. Malazgirt, O. Arcas-Abella, A. Yurdakul, and N. Sönmez. Microprocessors and Microsystems - Embedded Hardware Design, (2017)Prenaut: Design space exploration for embedded symmetric multiprocessing with various on-chip architectures.G. Malazgirt, and A. Yurdakul. Journal of Systems Architecture - Embedded Systems Design, (2017)

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Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.

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Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.