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Application specific multi-port memory customization in FPGAs., , , and . FPL, page 1-4. IEEE, (2014)Customizing VLIW processors from dynamically profiled execution traces., , and . Microprocessors and Microsystems - Embedded Hardware Design, 39 (8): 656-673 (2015)High-Level verifiable data-path Synthesis for DSP systems., , , , and . SIU, page 1-4. IEEE, (2012)Big Data and HPC Acceleration with Vivado HLS., , , , , , and . FPGAs for Software Programmers, Springer, (2016)A Verifiable High Level Data Path Synthesis Framework., , , , and . DSD, page 397-404. IEEE Computer Society, (2012)Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory., , , , , , and . Computing in Science and Engineering, 18 (1): 80-87 (2016)Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design., , and . CoRR, (2016)TauRieL: Targeting Traveling Salesman Problem with a deep reinforcement learning inspired architecture., , and . CoRR, (2019)Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology (Abstract Only)., , , , and . FPGA, page 277. ACM, (2015)High Level Synthesis Based Hardware Accelerator Design for Processing SQL Queries., , , , and . FPGAworld, page 27-32. ACM, (2015)