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Disambiguation of "Wei, Gu-Yeon"

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A Wide Dynamic Range Sparse FC-DNN Processor with Multi-Cycle Banked SRAM Read and Adaptive Clocking in 16nm FinFET.

, , , , , and . ESSCIRC, page 158-161. IEEE, (2018)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wei Yu University of Stuttgart

Control co-design optimization of floating offshore wind turbines with tuned liquid multi-column dampers, , , and . Wind energy science, 9 (4): 1053-1068 (2024)

Univ. -Prof. Dr. Daniel Weiskopf University of Stuttgart

Dataset for "How Deep Is Your Gaze? Leveraging Distance in Image-Based Gaze Analysis", , , and . Dataset, (2024)Related to: Maurice Koch, Nelusa Pathmanathan, Daniel Weiskopf, and Kuno Kurzhals.2024. How Deep Is Your Gaze? Leveraging Distance in Image-Based GazeAnalysis. In 2024 Symposium on Eye Tracking Research and Applications(ETRA ’24), June 04–07, 2024, Glasgow, United Kingdom. ACM, New York,NY, USA, 7 pages. doi: 10.1145/3649902.3653349.

Do Yeon Kim University of Stuttgart

Li-Wei Chen University of Stuttgart

Yasemin Gündüz University of Stuttgart

 

Other publications of authors with the same name

Understanding voltage variations in chip multiprocessors using a distributed power-delivery network., , , , and . DATE, page 624-629. EDA Consortium, San Jose, CA, USA, (2007)Digital wireline and PLL techniques., and . CICC, IEEE, (2009)A 8×5 Gb/s source-synchronous receiver with clock generator phase error correction., , and . CICC, page 459-462. IEEE, (2008)Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability., , , and . IEEE Micro, 28 (1): 60-68 (2008)Helix: Making the Extraction of Thread-Level Parallelism Mainstream., , , , and . IEEE Micro, 32 (4): 8-18 (2012)Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity., , , , , and . IEEE Micro, 30 (1): 110 (2010)Automating Design of Voltage Interpolation to Address Process Variations., , , and . IEEE Trans. VLSI Syst., 19 (3): 383-396 (2011)Process Variation Tolerant 3T1D-Based Cache Architectures., , , and . MICRO, page 15-26. IEEE Computer Society, (2007)Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling., , , , , , and . MICRO, page 77-88. IEEE Computer Society, (2010)A Highly Digital MDLL-Based Clock Multiplier That Leverages a Self-Scrambling Time-to-Digital Converter to Achieve Subpicosecond Jitter Performance., , , and . J. Solid-State Circuits, 43 (4): 855-863 (2008)