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Disambiguation of "Khellah, Muhammad M."

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Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses.

, , , , , , , , and . IEEE Trans. on Circuits and Systems, 55-I (7): 1904-1910 (2008)

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Muhammad Shahrukh Saeed University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

 

Other publications of authors with the same name

Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops., , , , , , , , , and 1 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (3): 208-217 (2011)SRAM dynamic stability estimation using MPFP and its applications., , , , , and . Microelectronics Journal, 40 (11): 1523-1530 (2009)Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays., , , , , , , and . J. Solid-State Circuits, 46 (4): 797-805 (2011)Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation., and . Great Lakes Symposium on VLSI, page 414-419. IEEE Computer Society, (1998)8.4 Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating., , , , , , , , and . ISSCC, page 152-153. IEEE, (2016)Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses., , , , , and . ISCAS (1), page 592-595. IEEE, (2005)Characterization of Inverse Temperature Dependence in logic circuits., , , , , and . CICC, page 1-4. IEEE, (2012)Trading Off Cache Capacity for Low-Voltage Operation., , , , , and . IEEE Micro, 29 (1): 96-103 (2009)A Low-Power High-Performance Embedded SRAM Macrocell., , and . Great Lakes Symposium on VLSI, page 13-17. IEEE Computer Society, (1998)Aging-aware Adaptive Voltage Scaling in 22nm high-K/metal-gate tri-gate CMOS., , , , and . CICC, page 1-4. IEEE, (2015)