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Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption.

S. Henzler, G. Georgakos, J. Berthold, and D. Schmitt-Landsiedel. PATMOS, volume 3254 of Lecture Notes in Computer Science, page 392-401. Springer, (2004)

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Dr. Ilche Georgievski University of Stuttgart

M. Sc. Patrick Georgi University of Stuttgart

Daniel Georg University of Stuttgart

Prof. Dr. Hans-Georg Kemper

Führungsinformationssysteme im Kontext der Business Intelligence: Das Beispiel bms:roi der Bayer MaterialScienceH. Baars, L. Burow, and H. Kemper. HMD Praxis der Wirtschaftsinformatik, 48 (6): 46-54 (2011)

Hon. -Prof. Dr. Georg Urban University of Stuttgart

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Power efficient digital IC design for a medical application with high reliability requirements.N. Aryan, N. Heidmann, M. Wirnshofer, N. Hellwege, J. Pistor, D. Peters-Drolshagen, G. Georgakos, S. Paul, and D. Schmitt-Landsiedel. PATMOS, page 1-5. IEEE, (2014)From an analytic NBTI device model to reliability assessment of complex digital circuits.N. Aryan, A. Listl, L. Heiß, C. Yilmaz, G. Georgakos, and D. Schmitt-Landsiedel. IOLTS, page 19-24. IEEE, (2014)In situ measurement of aging-induced performance degradation in digital circuits.N. Aryan, C. Funke, J. Bargfrede, C. Yilmaz, D. Schmitt-Landsiedel, and G. Georgakos. ETS, page 1-2. IEEE, (2016)Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena.F. Ruckerbauer, and G. Georgakos. IOLTS, page 203-204. IEEE Computer Society, (2007)A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions.T. Lüftner, J. Berthold, C. Pacha, G. Georgakos, G. Sauzon, O. Hoemke, J. Beshenar, P. Mahrla, K. Just, P. Hober and 9 other author(s). J. Solid-State Circuits, 42 (1): 134-144 (2007)From Device Aging Physics to Automated Circuit Reliability Sign Off.C. Schlünder, K. Waschneck, P. Rotter, S. Lachenmann, H. Reisinger, F. Ungar, and G. Georgakos. IRPS, page 1-12. IEEE, (2019)Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes.S. Henzler, P. Teichmann, M. Koban, J. Berthold, G. Georgakos, and D. Schmitt-Landsiedel. VLSI-SoC (Selected Papers), volume 200 of IFIP, page 229-245. Springer, (2003)Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes.S. Henzler, M. Koban, D. Schmitt-Landsiedel, J. Berthold, and G. Georgakos. VLSI-SOC, page 246-251. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Aging-aware Timing Analysis of Combinatorial Circuits on Gate Level (Alterungsanalyse von kombinatorischen Schaltungen auf Gatterebene).D. Lorenz, G. Georgakos, and U. Schlichtmann. it - Information Technology, 52 (4): 181-188 (2010)Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit.M. Wirnshofer, L. Heiß, A. Kakade, N. Aryan, G. Georgakos, and D. Schmitt-Landsiedel. DDECS, page 205-208. IEEE, (2012)