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Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption.

, , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 392-401. Springer, (2004)

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Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 392-401. Springer, (2004)In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations., , , , and . J. Solid-State Circuits, 42 (7): 1583-1592 (2007)Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes., , , , , and . VLSI-SoC (Selected Papers), volume 200 of IFIP, page 229-245. Springer, (2003)Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes., , , , and . VLSI-SOC, page 246-251. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 789-798. Springer, (2004)High-speed low-power frequency divider with intrinsic phase rotator., and . ISLPED, page 286-291. ACM, (2006)Power-Clock Gating in Adiabatic Logic Circuits., , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 638-646. Springer, (2005)Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits., , , , and . Conf. Computing Frontiers, page 414-420. ACM, (2005)Digitalization of mixed-signal functionality in nanometer technologies.. ICCAD, page 252-255. IEEE, (2010)Design and Application of Power Optimized High-Speed CMOS Frequency Dividers., and . IEEE Trans. VLSI Syst., 16 (11): 1513-1520 (2008)