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Resonant Tunneling Transistors for Threshold Logic Circuit Applications., , , , , and . Great Lakes Symposium on VLSI, page 344-345. IEEE Computer Society, (1999)Advances in Multi-Gate MOSFET Circuit Design., , , , , , , , , and 2 other author(s). ICECS, page 186-189. IEEE, (2007)Threshold logic circuit design of parallel adders using resonant tunneling devices., , , , , , , and . IEEE Trans. VLSI Syst., 8 (5): 558-572 (2000)Thermal issues in test: An overview of the significant aspects and industrial practice., , , , , , , , , and 2 other author(s). VTS, page 1-4. IEEE Computer Society, (2016)Layout options for stability tuning of SRAM cells in multi-gate-FET technologies., , , , , , , , , and 3 other author(s). ESSCIRC, page 392-395. IEEE, (2007)Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies., , , , , and . VLSI-SoC, page 78-83. IEEE, (2007)A merged MuGFET and planar SOI process., , , , , , , , , and 2 other author(s). SoCC, page 39-42. IEEE, (2007)A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions., , , , , , , , , and 9 other author(s). J. Solid-State Circuits, 42 (1): 134-144 (2007)Parameter Determination for Nano-Scale Modelling., , and . Fuzzy Days, volume 1625 of Lecture Notes in Computer Science, page 421-426. Springer, (1999)Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors., , and . DAC, page 947-950. ACM, (2009)