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Disambiguation of "Ferwana, Saleh"

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Ultradünne Chips in Flexibler Elektronik

, , , , , and . Elektronische Baugruppen und Leiterplatten : EBL 2012 : Hochentwickelte Baugruppen in Europa, page 73-77. Düsseldorf, DVS Media, (February 2012)

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Ali Salehi University of Stuttgart

 

Other publications of authors with the same name

Metal-Porous Silicon Contacts and Electrical Resistivity of Porous Silicon, , , , , and . Proceedings : SAFE 2009, 12th Annual Workshop on Semiconductors Advances for Future Electronics and Sensors and ProRISC 2009, 20th Annual Workshop on Circuits, Systems and Signal Processing : November 26 - 27, 2009, Veldhoven, the Netherlands, page 71-74. Utrecht, Techn. Foundation, (2009)Hybride Systeme in Folie (HySiF) Mittels Adaptivem Layout Und Laserdirektschreiber, , , , , , and . MikroSystemTechnik Kongress 2017 : MEMS, Mikroelektronik, Systeme 23.-25. Oktober 2017 in München, (2017)1593.Two-Dimensional Flex Sensor Exploiting Stacked Ultrathin Chips, , , , and . IEEE Electron Device Letters, 33 (3): 444-446 (March 2012)A flexible stress sensor using a sub-10μm silicon chip technology, , , , and . 2013 Transducers & Eurosensors XXVII: The 17th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS & EUROSENSORS XXVII), page 2628-2631. Piscataway, New Jersey, IEEE, (2013)Self-aligned through silicon vias in ultra-thin chips for 3D-integration, , , and . 2012 4th Electronic System-Integration Technology Conference, Piscataway, New Jersey, IEEE, (2012)Through-Silicon Via Technology in Chipfilm Substrates For 3D-Integration, , , , and . page 63-66. (2011)Dreidimensionale Aufbautechnik ultradünner Silizium Chips mit vertikaler Durchkontaktierung. Universität Stuttgart, Aachen, Dissertation, (2018)Stacked Ultrathin Chips with TSVs enabling 3D Flex-Sensors, , , and . (2012)Ultra-thin chip technology for system-in-foil applications, , , , , , , , and . 2010 International Electron Devices Meeting, page 2.5.1.-2.5.4.. Piscataway, New Jersey, IEEE, (2010)Compliant Substrate Based On Sintered Porous Silicon For The Local Integration Of Heterodevices With Silicon Microelectronics, , , and . 2009 Proceedings of the European Solid State Device Research Conference, Piscataway, New Jersey, IEEE, (2009)