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Disambiguation of "Chang, Yao-Wen"

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VCR: simultaneous via-template and cut-template-aware routing for directed self-assembly technology.

, and . ICCAD, page 49. ACM, (2016)

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Yao Wang University of Stuttgart

Dr. -Ing. Christoph Wenzel University of Stuttgart

Dr. rer. nat. Tim Wendlandt University of Stuttgart

Ingeborg Wenger University of Stuttgart

Florian Wenz University of Stuttgart

 

Other publications of authors with the same name

ECO Timing Optimization Using Spare Cells and Technology Remapping., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (5): 697-710 (2010)Obstacle-Avoiding Free-Assignment Routing for Flip-Chip Designs., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (2): 224-236 (2014)Modern Floorplanning Based on B*-Tree and Fast Simulated Annealing., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (4): 637-650 (2006)Guest Editorial., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (2): 165-166 (2011)TRECO: Dynamic Technology Remapping for Timing Engineering Change Orders., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (11): 1723-1733 (2012)Multilayer Global Routing With Via and Wire Capacity Considerations., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (5): 685-696 (2010)ECO Optimization Using Metal-Configurable Gate-Array Spare Cells., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (11): 1722-1733 (2013)Escape Routing for Staggered-Pin-Array PCBs., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (9): 1347-1356 (2013)Pulsed-Latch Aware Placement for Timing-Integrity Optimization., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (12): 1856-1869 (2011)Multilevel Full-Chip Gridless Routing With Applications to Optical-Proximity Correction., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (6): 1041-1053 (2007)