%0 Journal Article %1 journals/tcad/ChuangKSC11 %A Chuang, Yi-Lin %A Kim, Sangmin %A Shin, Youngsoo %A Chang, Yao-Wen %D 2011 %J IEEE Trans. on CAD of Integrated Circuits and Systems %K dblp %N 12 %P 1856-1869 %T Pulsed-Latch Aware Placement for Timing-Integrity Optimization. %U http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#ChuangKSC11 %V 30

@article{journals/tcad/ChuangKSC11, added-at = {2011-11-23T00:00:00.000+0100}, author = {Chuang, Yi-Lin and Kim, Sangmin and Shin, Youngsoo and Chang, Yao-Wen}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d6528cbc837d29426002b9380a365843/dblp}, ee = {http://dx.doi.org/10.1109/TCAD.2011.2165717}, interhash = {d96d78ad133ec3a971c55c5a36e04e8c}, intrahash = {d6528cbc837d29426002b9380a365843}, journal = {IEEE Trans. on CAD of Integrated Circuits and Systems}, keywords = {dblp}, number = 12, pages = {1856-1869}, timestamp = {2016-02-02T10:07:42.000+0100}, title = {Pulsed-Latch Aware Placement for Timing-Integrity Optimization.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#ChuangKSC11}, volume = 30, year = 2011 }