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Securing Access to Reconfigurable Scan Networks.

, , and . Asian Test Symposium, page 295-300. IEEE Computer Society, (2013)

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Deterministic Pattern Generation for Weighted Random Pattern Testing., and . ED&TC, page 30-36. IEEE Computer Society, (1996)Using mission logic for embedded testing., and . DATE, page 805. IEEE Computer Society, (2001)Reuse of Structural Volume Test Methods for In-System Testing of Automotive ASICs., , , , , and . Asian Test Symposium, page 214-219. IEEE Computer Society, (2012)Embedded Test for Highly Accurate Defect Localization., , , and . Asian Test Symposium, page 213-218. IEEE Computer Society, (2011)Accurate Multi-cycle ATPG in Presence of X-Values., , , , and . Asian Test Symposium, page 245-250. IEEE Computer Society, (2013)Tools and devices supporting the pseudo-exhaustive test., and . EURO-DAC, page 13-17. IEEE Computer Society, (1990)Hardware-optimal test register insertion., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 17 (6): 531-539 (1998)Optimized synthesis techniques for testable sequential circuits., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 11 (3): 301-312 (1992)On the Reliability Evaluation of SRAM-Based FPGA Designs., , and . FPL, page 403-408. IEEE, (2005)A Mixed-Mode BIST Scheme Based on Folding Compression., , and . J. Comput. Sci. Technol., 17 (2): 203-212 (2002)