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When processors get old: Evaluation of BTI and HCI effects on performance and reliability., , , and . IOLTS, page 185-186. IEEE, (2013)Defect Analysis for Delay-Fault BIST in FPGAs., , , and . IOLTS, page 124-128. IEEE Computer Society, (2003)Tracking BTI and HCI effects at circuit-level in adaptive systems., , , , and . NEWCAS, page 1-4. IEEE, (2016)On the Simulation of HCI-Induced Variations of IC Timings at High Level., , , , and . J. Electronic Testing, 29 (2): 127-141 (2013)Impact of Power Consumption and Temperature on Processor Lifetime Reliability., , , , , and . J. Low Power Electronics, 8 (1): 83-94 (2012)Impact of the application activity on intermittent faults in embedded systems., , , , and . VTS, page 191-196. IEEE Computer Society, (2011)Relation between HCI-induced performance degradation and applications in a RISC processor., , , and . IOLTS, page 67-72. IEEE Computer Society, (2012)Fine-grain analysis of the parameters involved in aging of digital circuits., , and . IOLTS, page 51-53. IEEE, (2016)A Lightweight API for an Adaptive Software Fault Tolerance Using POSIX-Thread Replication., , and . ARCS Workshops, VDE-Verlag, (2011)High Level Power and Energy Exploration Using ArchC., , , , , and . SBAC-PAD, page 25-32. IEEE Computer Society, (2010)