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A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip., , , , , , and . J. Solid-State Circuits, 43 (1): 223-235 (2008)High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques., , , , , , and . IEEE Trans. VLSI Syst., 25 (8): 2296-2306 (2017)Statistical Estimation of Dominant Physical Parameters for Leakage Variability in 32 Nanometer CMOS, Under Supply Voltage Variations., , , , , , and . J. Low Power Electronics, 8 (1): 113-124 (2012)Low-Cost Dynamic Voltage and Frequency Management Based upon Robust Control Techniques under Thermal Constraints., , , , , and . FMCO, volume 7542 of Lecture Notes in Computer Science, page 334-353. Springer, (2011)Unified Power Format (UPF) methodology in a vendor independent flow., , , and . PATMOS, page 82-88. IEEE, (2015)Evaluation and mitigation of aging effects on a digital on-chip voltage and temperature sensor., , , , , and . PATMOS, page 111-117. IEEE, (2015)Design and Implementation of a GALS Adapter for ANoC Based Architectures., , and . ASYNC, page 13-22. IEEE Computer Society, (2009)Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction., , , and . ASYNC, page 48-57. IEEE Computer Society, (2008)A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking., , , , , , , , , and 7 other author(s). J. Solid-State Circuits, 50 (1): 125-136 (2015)A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links., , , , , , , , , and 9 other author(s). J. Solid-State Circuits, 52 (1): 33-49 (2017)