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Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.

S. Wang, S. Pal, T. Li, A. Pan, C. Grezes, P. Amiri, K. Wang, and P. Gupta. DATE, page 1438-1443. IEEE, (2017)

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Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

PROCEED: A Pareto Optimization-Based Circuit-Level Evaluator for Emerging Devices.S. Wang, A. Pan, C. Chui, and P. Gupta. IEEE Trans. VLSI Syst., 24 (1): 192-205 (2016)An Evaluation Framework for Nanotransfer Printing-Based Feature-Level Heterogeneous Integration in VLSI Circuits.G. Leung, S. Wang, A. Pan, P. Gupta, and C. Chui. IEEE Trans. VLSI Syst., 24 (5): 1858-1870 (2016)Assessing Benefits of a Buried Interconnect Layer in Digital Designs.L. Zhu, Y. Badr, S. Wang, S. Iyer, and P. Gupta. IEEE Trans. on CAD of Integrated Circuits and Systems, 36 (2): 346-350 (2017)MEMRES: A Fast Memory System Reliability Simulator.S. Wang, H. Hu, H. Zheng, and P. Gupta. IEEE Trans. Reliability, 65 (4): 1783-1797 (2016)Regularization-Free Structural Pruning for GPU Inference Acceleration.C. Guo, Y. Yang, L. Zhang, S. Wang, H. Li, K. Long, X. Yin, and C. Zhuo. ISQED, page 149-153. IEEE, (2021)MTJ variation monitor-assisted adaptive MRAM write.S. Wang, H. Lee, C. Grezes, P. Khalili, K. Wang, and P. Gupta. DAC, page 169:1-169:6. ACM, (2016)PROCEED: A pareto optimization-based circuit-level evaluator for emerging devices.S. Wang, A. Pan, C. Chui, and P. Gupta. ASP-DAC, page 818-824. IEEE, (2014)A Word Line Pulse Circuit Technique for Reliable Magnetoelectric Random Access Memory.H. Lee, A. Lee, S. Wang, F. Ebrahimi, P. Gupta, P. Amiri, and K. Wang. IEEE Trans. VLSI Syst., 25 (7): 2027-2034 (2017)Comparative Evaluation of Spin-Transfer-Torque and Magnetoelectric Random Access Memory.S. Wang, H. Lee, F. Ebrahimi, P. Amiri, K. Wang, and P. Gupta. IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (2): 134-145 (2016)Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.S. Wang, S. Pal, T. Li, A. Pan, C. Grezes, P. Amiri, K. Wang, and P. Gupta. DATE, page 1438-1443. IEEE, (2017)

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Disambiguation of "Wang, Shaodi"

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Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.

Please choose a person to relate this publication to

Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Wang, Shaodi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.

Please choose a person to relate this publication to

Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
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Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.