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Disambiguation of "Cristal, Adrián"

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Out-of-Order Commit Processors.

, , , and . HPCA, page 48-59. IEEE Computer Society, (2004)

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Adrian Schlottke University of Stuttgart

Adrian Barwasser University of Stuttgart

Adrian Eitle University of Stuttgart

PD Dr. -Ing. Adrian Pocanschi University of Stuttgart

Adrian Stock University of Stuttgart

 

Other publications of authors with the same name

The Velox Transactional Memory Stack., , , , , , , , , and 14 other author(s). IEEE Micro, 30 (5): 76-87 (2010)A partitioned instruction queue to reduce instruction wakeup energy., , , , and . IJHPCN, 1 (4): 153-161 (2004)EVX: Vector execution on low power EDGE cores., , , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)unreadTVar: Extending Haskell Software Transactional Memory for Performance., , , , , and . Trends in Functional Programming, volume 8 of Trends in Functional Programming, page 89-104. Intellect, (2007)Transactional Memory: An Overview., , , , , , and . IEEE Micro, 27 (3): 8-29 (2007)JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories., , , , and . ISVLSI, page 149-154. IEEE Computer Society, (2015)Implications of non-volatile memory as primary storage for database management systems., , , , and . SAMOS, page 164-171. IEEE, (2016)A Demo of FPGA Aggressive Voltage Downscaling: Power and Reliability Tradeoffs., , and . FPL, page 451-452. IEEE Computer Society, (2018)A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques., , , , , and . ISLPED, page 362-367. ACM, (2016)A Deep Learning Mapper (DLM) for Scheduling on Heterogeneous Systems., , , , , , and . CARLA, volume 796 of Communications in Computer and Information Science, page 3-20. Springer, (2017)