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Disambiguation of "Satpathy, Sudhir"

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XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems.

, , , , , , , , and . PACT, page 75-86. ACM, (2012)

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A standard cell compatible bidirectional repeater with thyristor assist., , and . VLSIC, page 174-175. IEEE, (2012)Low power interconnects for SIMD computers., , , , , , and . DATE, page 600-605. IEEE, (2011)Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores., , , , , , , , , and 5 other author(s). ISSCC, page 190-192. IEEE, (2012)An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (4): 1074-1085 (2019)2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors., , , , , , , , and . IEEE J. Solid State Circuits, 47 (11): 2807-2821 (2012)A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 56 (4): 1141-1151 (2021)A 350mV-900mV 2.1GHz 0.011mm2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS., , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)A 220-900mV 179Mcode/s 36pJ/code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS., , , , , , , , , and 2 other author(s). CICC, page 1-4. IEEE, (2019)A 305mV-850mV 400μW 45GSamples/J reconfigurable compressive sensing engine with early-termination for ultra-low energy target detection in 14nm tri-gate CMOS., , , , , , , , , and . A-SSCC, page 253-256. IEEE, (2016)Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 48 (1): 104-117 (2013)