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code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS.

S. Satpathy, V. Suresh, R. Kumar, V. Gopal, J. Guilford, K. Yap, M. Anders, H. Kaul, A. Agarwal, S. Hsu, R. Krishnamurthy, and S. Mathew. CICC, page 1-4. IEEE, (2019)

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Dharshan Lokekere Gopal University of Stuttgart

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Toward Postquantum Security for Embedded Cores.R. Misoczki, S. Gulley, V. Gopal, M. Dixon, H. Vrsalovic, and W. Feghali. IEEE Micro, 39 (4): 17-26 (2019)Fast multiplication techniques for public key cryptography.V. Gopal, S. Grover, and M. Kounavis. ISCC, page 316-325. IEEE Computer Society, (2008)Fast Modular Reduction.W. Hasenplaugh, G. Gaubatz, and V. Gopal. IEEE Symposium on Computer Arithmetic, page 225-229. IEEE Computer Society, (2007)A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array.S. Satpathy, V. Suresh, R. Kumar, V. Gopal, J. Guilford, M. Anders, H. Kaul, A. Agarwal, S. Hsu, R. Krishnamurthy and 2 other author(s). VLSI Circuits, page 238-. IEEE, (2019)Techniques to Encode and Compress Fault Dictionaries.S. Chakravarty, and V. Gopal. VTS, page 195-200. IEEE Computer Society, (1999)Accelerated Processing of Secure Email by Exploiting Built-in Security Features on the Intel EP80579 Integrated Processor with Intel QuickAssist Technology.V. Keshavamurthy, S. Upadhyaya, and V. Gopal. SRDS Workshops, page 1-8. IEEE Computer Society, (2011)34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms.S. Satpathy, S. Mathew, V. Suresh, V. Gopal, J. Guilford, M. Anders, H. Kaul, A. Agarwal, S. Hsu, and K. Krisnnamurthy. ESSCIRC, page 90-93. IEEE, (2018)A hybrid network coding technique for single-hop wireless networks.T. Tran, T. Nguyen, B. Bose, and V. Gopal. IEEE Journal on Selected Areas in Communications, 27 (5): 685-698 (2009)A 280mV 3.1pJ/code Huffman Decoder for DEFLATE Decompression Featuring Opportunistic Code Skip and 3-way Symbol Generation in 14nm Tri-gate CMOS.S. Satpathy, S. Mathew, V. Suresh, V. Gopal, J. Guilford, M. Anders, H. Kaul, A. Agarwal, S. Hsu, and R. Krishnamurthy. A-SSCC, page 263-266. IEEE, (2018)Data De-duplication and Event Processing for Security Applications on an Embedded Processor.H. Nagarajaiah, S. Upadhyaya, and V. Gopal. SRDS, page 418-423. IEEE Computer Society, (2012)

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A 220-900mV 179Mcode/s 36pJ/code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS.

Please choose a person to relate this publication to

Dharshan Lokekere Gopal University of Stuttgart

Other publications of authors with the same name

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PUMA

Disambiguation of "Gopal, Vinodh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 220-900mV 179Mcode/s 36pJ/code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS.

Please choose a person to relate this publication to

Dharshan Lokekere Gopal University of Stuttgart

Other publications of authors with the same name

Disambiguation

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Chicago
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A 220-900mV 179Mcode/s 36pJ/code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS.