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Disambiguation of "Lee, Yoonmyung"

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Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS.

, , , , , , , , , , , , , , and . J. Solid-State Circuits, 48 (1): 104-117 (2013)

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Moosung Lee University of Stuttgart

Dongwon Lee University of Stuttgart

Junghwa Lee University of Stuttgart

Ph. D. Benjamin Lee University of Stuttgart

Yoonhee Lee University of Stuttgart

 

Other publications of authors with the same name

An ultra-low-power 9.8GHz crystal-less UWB transceiver with digital baseband integrated in 0.18µm BiCMOS., , , , , and . ISSCC, page 442-443. IEEE, (2013)Centip3De: A 64-Core, 3D Stacked Near-Threshold System., , , , , , , , , and 5 other author(s). IEEE Micro, 33 (2): 8-16 (2013)Centip3De: a many-core prototype exploring 3D integration and near-threshold computing., , , , , , , , , and 5 other author(s). Commun. ACM, 56 (11): 97-104 (2013)SLC: Split-control Level Converter for dense and stable wide-range voltage conversion., , , and . ESSCIRC, page 478-481. IEEE, (2012)An Ultra-Low-Power 9.8 GHz Crystal-Less UWB Transceiver With Digital Baseband Integrated in 0.18 µm BiCMOS., , , , , , and . J. Solid-State Circuits, 48 (12): 3178-3189 (2013)An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring., , , , , , , , , and 3 other author(s). J. Solid-State Circuits, 50 (1): 375-390 (2015)A 1.08-nW/kHz 13.2-ppm/°C Self-Biased Timer Using Temperature-Insensitive Resistive Current., , , , and . J. Solid-State Circuits, 53 (8): 2311-2318 (2018)Achieving Ultralow Standby Power With an Efficient SCCMOS Bias Generator., , , , and . IEEE Trans. on Circuits and Systems, 60-II (12): 842-846 (2013)Low power battery supervisory circuit with adaptive battery health monitor., , , and . VLSIC, page 1-2. IEEE, (2014)Circuit and system design guidelines for ultra-low power sensor nodes., , , , and . DAC, page 1037-1042. ACM, (2012)