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Disambiguation of "Sridhar, Ramalingam"

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Defect Analysis and Defect Tolerant Design of Multi-port SRAMs.

, , , and . J. Electronic Testing, 24 (1-3): 165-179 (2008)

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Leakage current, active power, and delay analysis of dynamic dual Vt CMOS circuits under P-V-T fluctuations., , , , , and . Microelectronics Reliability, 51 (9-11): 1498-1502 (2011)Hybrid-cell register files design for improving NBTI reliability., , , , , and . Microelectronics Reliability, 52 (9-10): 1865-1869 (2012)Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits., , and . J. Low Power Electronics, 1 (2): 182-193 (2005)Variability Aware Low-Power Delay Optimal Buffer Insertion for Global Interconnects., and . IEEE Trans. on Circuits and Systems, 57-I (12): 3055-3063 (2010)Parallel Intersecting Compressed Bit Vectors in a High Speed Query Server for Processing Postal Addresses., , and . HPCA, page 232-241. IEEE Computer Society, (1996)A Simple Cost-Effective Framework for iPhone Forensic Analysis., , and . ICDF2C, volume 53 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 27-37. Springer, (2010)Robust 3GHz CMOS low noise amplifier adapted for RFID receivers., , and . SoCC, page 91-94. IEEE, (2007)Defect Analysis and Defect Tolerant Design of Multi-port SRAMs., , , and . J. Electronic Testing, 24 (1-3): 165-179 (2008)A high speed and low power content-addressable memory(CAM) using pipelined scheme., , and . SoCC, page 345-349. IEEE, (2015)A local clocking approach for self-timed datapath designs., and . Great Lakes Symposium on VLSI, page 152-. IEEE Computer Society, (1995)