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Disambiguation of "Upadhyaya, Shambhu J."

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Defect Analysis and Defect Tolerant Design of Multi-port SRAMs.

, , , and . J. Electronic Testing, 24 (1-3): 165-179 (2008)

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Devanshi Upadhyaya University of Stuttgart

J. K\"astner

J. Schwarz

J. K\"astner

J Walter

 

Other publications of authors with the same name

QoS-LI: QoS Loss Inference in Disadvantaged Networks., , and . AINA Workshops (2), page 524-529. IEEE Computer Society, (2007)Implementation of a Gracefully Degradable Binary Tree in Programmable., and . DFT, page 28-36. IEEE Computer Society, (1994)Design Considerations for High Performance RF Cores Based on Process Variation Study., , , , , , and . J. Electronic Testing, 24 (1-3): 143-155 (2008)USim: A User Behavior Simulation Framework for Training and Testing IDSes in GUI Based Systems., , , and . Annual Simulation Symposium, page 196-203. IEEE Computer Society, (2006)Inferring Sources of Leaks in Document Management Systems., , and . IFIP Int. Conf. Digital Forensics, volume 285 of IFIP, page 291-306. Springer, (2008)A new framework for generating optimal March tests for memory arrays., , and . ITC, page 73-82. IEEE Computer Society, (1998)Power Constrained Test Scheduling with Dynamically Varied TAM., and . VTS, page 273-278. IEEE Computer Society, (2003)A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units., and . VTS, page 391-397. IEEE Computer Society, (1999)Insecure Programming: How Culpable is a Language's Syntax?, , , and . IAW, page 158-163. IEEE, (2003)Control Constrained Resource Partitioning for Complex SoCs., , and . DFT, page 425-432. IEEE Computer Society, (2003)