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Control Constrained Resource Partitioning for Complex SoCs.

, , and . DFT, page 425-432. IEEE Computer Society, (2003)

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Deep-Submicron CMOS Design Methodology for High-Performance Low-Power Analog-to-Digital Converters., , and . VLSI-SOC, page 380-385. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)1.8V 0.18µm CMOS Novel Successive Approximation ADC., , and . VLSI-SOC, page 375-379. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)A New Test Methodology For DNL Error In Flash ADC's., , , and . DFT, page 582-590. IEEE Computer Society, (2005)Low-Power SRAM Circuit Design.. MTDT, page 115-122. IEEE Computer Society, (1999)Application of convolutional neural networks on Intel® Xeon® processor with integrated FPGA., , , , and . HPEC, page 1-7. IEEE, (2017)New Embedded Core Testing for System-on-Chips and System-in-Packages., and . CCECE, page 1897-1900. IEEE, (2006)Resource-efficient implementation of Blue Midnight Wish-256 hash function on Xilinx FPGA platform., , , and . IAS, page 44-47. IEEE, (2010)A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications., , , and . AHS, page 119-126. IEEE Computer Society, (2007)A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems., , , and . VLSI Design, page 1023-1026. IEEE Computer Society, (2004)Ballistic Deflection Transistors and the Emerging Nanoscale Era., , , , , and . ISCAS, page 61-64. IEEE, (2009)