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An On-Chip Test Structure and Digital Measurement Method for Statistical Characterization of Local Random Variability in a Process.

, , , , and . J. Solid-State Circuits, 43 (9): 1951-1963 (2008)

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Power-Aware Testing and Test Strategies for Low Power Devices., , , , and . DATE, ACM, (2008)Accelerated BTI degradation under stochastic TDDB effect., , , , , and . IRPS, page 5. IEEE, (2018)Analysis of Bridge Defects in STT-MRAM Cells Under Process Variations and a Robust DFT Technique for Their Detection., , , and . VLSI-SoC (Selected Papers), volume 561 of IFIP Advances in Information and Communication Technology, page 207-231. Springer, (2018)VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power., , , and . MICRO, page 19-28. IEEE Computer Society, (2003)Recognition of unideal iris images using region-based active contour model and game theory., , , and . ICIP, page 1705-1708. IEEE, (2010)Automatic Indic script identification from handwritten documents: page, block, line and word-level approach., , , , and . Int. J. Machine Learning & Cybernetics, 10 (1): 87-106 (2019)LSTM for Anomaly-Based Network Intrusion Detection., , and . ITNAC, page 1-3. IEEE Computer Society, (2018)Adaptive supply voltage technique for low swing interconnects., , and . ASP-DAC, page 284-287. IEEE Computer Society, (2004)Nonideal Iris Recognition Using Level Set Approach and Coalitional Game Theory., and . ICVS, volume 5815 of Lecture Notes in Computer Science, page 394-402. Springer, (2009)Iris recognition using shape-guided approach and game theory., , and . Pattern Anal. Appl., 14 (4): 329-348 (2011)