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Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (5): 816-829 (2010)Pinched hysteresis loops in non-linear resonators., , , and . IET Circuits Devices Syst., 15 (2): 88-93 (2021)Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators., , , and . CSSP, 38 (3): 1342-1359 (2019)System-Level Sub-20 nm Planar and FinFET CMOS Delay Modelling for Supply and Threshold Voltage Scaling Under Process Variation., , and . J. Low Power Electronics, 15 (1): 1-10 (2019)Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era., , , , and . IEEE Access, (2019)Instruction-Based Voltage Scaling for Power Reduction in SIMD MPSoCs.. J. Low Power Electronics, 7 (2): 141-147 (2011)MorphoSys reconfigurable hardware for cryptography: the twofish case., and . The Journal of Supercomputing, 59 (1): 22-41 (2012)Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT., , , and . SoCC, page 357-360. IEEE, (2009)RTL delay macro-modeling with Vt and Vdd variability., , , and . IDT, page 118-123. IEEE, (2011)Reducing random-dopant fluctuation impact using footer transistors in many-core systems.. Integration, (2015)