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Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C.

, , , , , , , , , and . J. Solid-State Circuits, 53 (9): 2512-2531 (2018)

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Radio receiver techniques., and . CICC, page 1. IEEE, (2012)Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers., , and . CICC, page 639-642. IEEE, (2007)A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers., , , , and . VTS, page 249-254. IEEE Computer Society, (2005)Co-Learning Bayesian Model Fusion: Efficient Performance Modeling of Analog and Mixed-Signal Circuits Using Side Information., , , , and . ICCAD, page 575-582. IEEE, (2015)Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers., and . IEEE Design & Test of Computers, 29 (6): 5-6 (2012)Adaptive Circuit Design Methodology and Test Applied to Millimeter-Wave Circuits., , , , , , , , and . IEEE Design & Test, 31 (6): 8-18 (2014)A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS., , , , , , , , , and 5 other author(s). IEEE Trans. on Circuits and Systems, 60-I (8): 2009-2017 (2013)A 52 GHz Frequency Synthesizer Featuring a 2nd Harmonic Extraction Technique That Preserves VCO Performance., , and . J. Solid-State Circuits, 50 (5): 1214-1223 (2015)An On-Chip Transfer Function Characterization System for Analog Built-in Testing., , and . VTS, page 261-266. IEEE Computer Society, (2004)On-Chip Testing Techniques for RF Wireless Transceivers., , and . IEEE Design & Test of Computers, 23 (4): 268-277 (2006)