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Lateral NWFET optimization for beyond 7nm nodes.

D. Yakimets, D. Jang, P. Raghavan, G. Eneman, H. Mertens, P. Schuddinck, A. Mallik, M. Bardon, N. Collaert, A. Mercha, D. Verkest, A. Thean, and K. Meyer. ICICDT, page 1-4. IEEE, (2015)

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A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency.R. Fasthuber, P. Raghavan, L. der Perre, and F. Catthoor. IEEE Trans. VLSI Syst., 23 (10): 1973-1986 (2015)Locality optimization in a compiler for wireless applications.J. Absar, P. Raghavan, A. Lambrechts, M. Li, M. Jayapala, and F. Catthoor. Design Autom. for Emb. Sys., 13 (1-2): 53-72 (2009)Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling.Y. Kobayashi, M. Jayapala, P. Raghavan, F. Catthoor, and M. Imai. IEICE Transactions, 91-A (2): 604-612 (2008)Compilation Technique for Loop Overhead Minimization.N. Kroupis, P. Raghavan, M. Jayapala, F. Catthoor, and D. Soudris. DSD, page 419-426. IEEE Computer Society, (2009)Coarse-Grained Reconfigurable Array Architectures.B. Sutter, P. Raghavan, and A. Lambrechts. Handbook of Signal Processing Systems, Springer, (2013)A multi-threaded coarse-grained array processor for wireless baseband.T. Aa, M. Palkovic, M. Hartmann, P. Raghavan, A. Dejonghe, and L. der Perre. SASP, page 102-107. IEEE Computer Society, (2011)Bias Temperature Instability analysis of FinFET based SRAM cells.S. Khan, I. Agbo, S. Hamdioui, H. Kukner, B. Kaczer, P. Raghavan, and F. Catthoor. DATE, page 1-6. European Design and Automation Association, (2014)Resolving the memory bottleneck for single supply near-threshold computing.T. Gemmeke, M. Sabry, J. Stuijt, P. Raghavan, F. Catthoor, and D. Atienza. DATE, page 1-6. European Design and Automation Association, (2014)System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform.P. Agrawal, D. Milojevic, P. Raghavan, F. Catthoor, L. der Perre, E. Beyne, and R. Varadarajan. Embedded Systems Letters, 6 (4): 85-88 (2014)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors.B. Sutter, O. Allam, P. Raghavan, R. Vandebriel, H. Cappelle, T. Aa, and B. Mei. Signal Processing Systems, 61 (2): 157-179 (2010)

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Lateral NWFET optimization for beyond 7nm nodes.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Lateral NWFET optimization for beyond 7nm nodes.

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Lateral NWFET optimization for beyond 7nm nodes.