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Catalytic Mechanism of Salicylate Dioxygenase: QM/MM Simulations Reveal the Origin of Unexpected Regioselectivity of the Ring Cleavage

, and . Chem. Eur. J., (2017)
DOI: 10.1002/chem.201701286

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Large Scale VLSI Circuit Simulation Using Point Relaxation., , , and . CSC, page 343-347. CSREA Press, (2010)Towards Optimal Performance-Area Trade-Off in Adders by Synthesis of Parallel Prefix Structures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (10): 1517-1530 (2014)Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (5): 820-831 (2016)OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions., , , and . DAC, page 129:1-129:6. ACM, (2015)Catalytic mechanism of salicylate dioxygenase : QM/MM simulations reveal the origin of unexpected regioselectivity of the ring cleavage, and . Chemistry - a European journal, 23 (37): 8949-8962 (2017)Clock Tree Resynthesis for Multi-Corner Multi-Mode Timing Closure., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (4): 589-602 (2015)Reliability Aware Gate Sizing Combating NBTI and Oxide Breakdown., and . VLSI Design, page 38-43. IEEE Computer Society, (2014)CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction., , , , and . ICCD, page 236-243. IEEE Computer Society, (2015)Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures., , , and . DAC, page 48:1-48:8. ACM, (2013)Cross-Layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (12): 2298-2311 (2019)