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Disambiguation of "Wang, Naigang"

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An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors.

, , , , , , , , , , and . VLSIC, page 192-. IEEE, (2015)

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Zhe Wang University of Stuttgart

Dr. Dongren Wang University of Stuttgart

Dr. rer. nat. Lei Wang University of Stuttgart

Yi Wang University of Stuttgart

Yao Wang University of Stuttgart

 

Other publications of authors with the same name

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 48 (1): 244-254 (2013)Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks., , , , , , , , and . NeurIPS, page 4901-4910. (2019)Innovate Practices on CyberSecurity of Hardware Semiconductor Devices., , , , , , , , , and 4 other author(s). VTS, page 1. IEEE, (2019)A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling., , , , , , , , , and 34 other author(s). IEEE J. Solid State Circuits, 57 (1): 182-197 (2022)Efficient AI System Design With Cross-Layer Approximate Computing., , , , , , , , , and 30 other author(s). Proc. IEEE, 108 (12): 2232-2250 (2020)A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2., , , , , , , , , and 5 other author(s). ISSCC, page 400-402. IEEE, (2012)An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors., , , , , , , , , and 1 other author(s). VLSIC, page 192-. IEEE, (2015)A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference., , , , , , , , , and 21 other author(s). VLSI Circuits, page 35-36. IEEE, (2018)Across the Stack Opportunities for Deep Learning Acceleration., , , , , , , , , and 21 other author(s). ISLPED, page 35:1-35:2. ACM, (2018)Training Deep Neural Networks with 8-bit Floating Point Numbers., , , , and . NeurIPS, page 7686-7695. (2018)