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Across the Stack Opportunities for Deep Learning Acceleration.

V. Srinivasan, B. Fleischer, S. Shukla, M. Ziegler, J. Silberman, J. Oh, J. Choi, S. Mueller, A. Agrawal, T. Babinsky, N. Cao, C. Chen, P. Chuang, T. Fox, G. Gristede, M. Guillorn, H. Haynie, M. Klaiber, D. Lee, S. Lo, G. Maier, M. Scheuermann, S. Venkataramani, C. Vezyrtzis, N. Wang, F. Yee, C. Zhou, P. Lu, B. Curran, L. Chang, and K. Gopalakrishnan. ISLPED, page 35:1-35:2. ACM, (2018)

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Bruce Thomas University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

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The IBM eServer z990 floating-point unit.G. Gerwig, H. Wetter, E. Schwarz, J. Haess, C. Krygowski, B. Fleischer, and M. Kroener. IBM Journal of Research and Development, 48 (3-4): 311-322 (2004)Exponent monitoring for low-cost concurrent error detection in FPU control logic.M. Maniatakos, Y. Makris, P. Kudva, and B. Fleischer. VTS, page 235-240. IEEE Computer Society, (2011)Efficient AI System Design With Cross-Layer Approximate Computing.S. Venkataramani, X. Sun, N. Wang, C. Chen, J. Choi, M. Kang, A. Agarwal, J. Oh, S. Jain, T. Babinsky and 30 other author(s). Proc. IEEE, 108 (12): 2232-2250 (2020)A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.B. Fleischer, S. Shukla, M. Ziegler, J. Silberman, J. Oh, V. Srinivasan, J. Choi, S. Mueller, A. Agrawal, T. Babinsky and 21 other author(s). VLSI Circuits, page 35-36. IEEE, (2018)A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation.G. Ditlow, R. Montoye, S. Storino, S. Dance, S. Ehrenreich, B. Fleischer, T. Fox, K. Holmes, J. Mihara, Y. Nakamura and 4 other author(s). ISSCC, page 256-258. IEEE, (2011)Active Memory Cube: A processing-in-memory architecture for exascale systems.R. Nair, S. Antão, C. Bertolli, P. Bose, J. Brunheroto, T. Chen, C. Cher, C. Costa, J. Doi, C. Evangelinos and 22 other author(s). IBM Journal of Research and Development, (2015)Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers.M. Maniatakos, P. Kudva, B. Fleischer, and Y. Makris. IEEE Trans. Computers, 62 (7): 1376-1388 (2013)Blue Gene: A vision for protein science using a petaflop supercomputer.F. Allen, G. Almási, W. Andreoni, D. Beece, B. Berne, A. Bright, J. Brunheroto, C. Cascaval, J. Castaños, P. Coteus and 42 other author(s). IBM Systems Journal, 40 (2): 310-327 (2001)Static timing analysis for self resetting circuits.V. Narayanan, B. Chappell, and B. Fleischer. ICCAD, page 119-126. IEEE Computer Society / ACM, (1996)Across the Stack Opportunities for Deep Learning Acceleration.V. Srinivasan, B. Fleischer, S. Shukla, M. Ziegler, J. Silberman, J. Oh, J. Choi, S. Mueller, A. Agrawal, T. Babinsky and 21 other author(s). ISLPED, page 35:1-35:2. ACM, (2018)

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Disambiguation of "Fleischer, Bruce M."

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Across the Stack Opportunities for Deep Learning Acceleration.

Please choose a person to relate this publication to

Bruce Thomas University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Fleischer, Bruce M."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Across the Stack Opportunities for Deep Learning Acceleration.

Please choose a person to relate this publication to

Bruce Thomas University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
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Across the Stack Opportunities for Deep Learning Acceleration.