%0 Conference Paper %1 asada2015logicclockpathaware %A Asada, K. %A Wen, Xiaoqing %A Holst, Stefan %A Miyase, Kohei %A Kajihara, Seiji %A Kochte, Michael A. %A Schneider, Eric %A Wunderlich, Hans-Joachim %A Qian, J. %B 2015 IEEE 24th Asian Test Symposium (ATS 2015) %C Piscataway, NJ %D 2015 %I IEEE Computer Society %K %P 103-108 %R 10.1109/ATS.2015.25 %T Logic/clock-path-aware at-speed scan test generation for avoiding false capture failures and reducing clock stretch %@ 978-1-4673-9739-1

@inproceedings{asada2015logicclockpathaware, added-at = {2023-08-31T16:34:06.000+0200}, address = {Piscataway, NJ}, author = {Asada, K. and Wen, Xiaoqing and Holst, Stefan and Miyase, Kohei and Kajihara, Seiji and Kochte, Michael A. and Schneider, Eric and Wunderlich, Hans-Joachim and Qian, J.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/208bbed18a9a400dd28e24f0ed8d4b0e8/puma-wartung}, booktitle = { 2015 IEEE 24th Asian Test Symposium (ATS 2015)}, doi = {10.1109/ATS.2015.25}, eventdate = {2015-11-22/2015-11-25}, eventtitle = {2015 IEEE 24th Asian Test Symposium (ATS 2015)}, interhash = {503478c4c4c663030c7267cacda3d358}, intrahash = {08bbed18a9a400dd28e24f0ed8d4b0e8}, isbn = {978-1-4673-9739-1}, keywords = {}, language = {eng}, pages = {103-108}, publisher = {IEEE Computer Society}, timestamp = {2023-08-31T14:34:06.000+0200}, title = {Logic/clock-path-aware at-speed scan test generation for avoiding false capture failures and reducing clock stretch}, venue = {Mumbai, India}, year = 2015 }