%0 Conference Paper %1 conf/fpl/MasselosTQVCRP06 %A Masselos, Konstantinos %A Tiensyrjä, Kari %A Qu, Yang %A Voros, Nikos S. %A Cupák, Miroslav %A Rijnders, Luc %A Pettissalo, Marko %B FPL %D 2006 %I IEEE %K dblp %P 1-6 %T System Level Architecture Exploration for Reconfigurable Systems On Chip. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#MasselosTQVCRP06 %@ 1-4244-0312-X

@inproceedings{conf/fpl/MasselosTQVCRP06, added-at = {2016-04-26T00:00:00.000+0200}, author = {Masselos, Konstantinos and Tiensyrjä, Kari and Qu, Yang and Voros, Nikos S. and Cupák, Miroslav and Rijnders, Luc and Pettissalo, Marko}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2eea654ac78c49457333ba88b8734dc59/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2006}, ee = {http://dx.doi.org/10.1109/FPL.2006.311195}, interhash = {496ca0c72beee2ff1e7d96ecb5d17ed8}, intrahash = {eea654ac78c49457333ba88b8734dc59}, isbn = {1-4244-0312-X}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2016-04-27T09:33:19.000+0200}, title = {System Level Architecture Exploration for Reconfigurable Systems On Chip.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#MasselosTQVCRP06}, year = 2006 }