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Disambiguation of "Raghunathan, Anand"

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A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (11): 2035-2045 (2007)

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Anand Venkatachalam University of Stuttgart

Mahathi Anand University of Stuttgart

 

Other publications of authors with the same name

High-level Synthesis of Multi-process Behavioral Descriptions., , , and . VLSI Design, page 467-473. IEEE Computer Society, (2003)High-Level Synthesis with SIMD Units., , , and . VLSI Design, page 407-413. IEEE Computer Society, (2002)Variation-Aware System-Level Power Analysis., , , and . IEEE Trans. VLSI Syst., 18 (8): 1173-1184 (2010)Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms., , , and . DATE, page 728-733. European Design and Automation Association, Leuven, Belgium, (2006)Trustworthiness of Medical Devices and Body Area Networks., , and . Proceedings of the IEEE, 102 (8): 1174-1188 (2014)Exploiting the forgiving nature of applications for scalable parallel execution., , , and . IPDPS, page 1-12. IEEE, (2010)A framework for efficient and scalable execution of domain-specific templates on GPUs., , and . IPDPS, page 1-12. IEEE, (2009)Guest Editors' Introduction: Green Buildings., and . IEEE Design & Test of Computers, 29 (4): 5-7 (2012)A Secure User Interface for Web Applications Running Under an Untrusted Operating System., , and . CIT, page 865-870. IEEE Computer Society, (2010)Hybrid Architectures for Efficient and Secure Face Authentication in Embedded Systems., , , and . IEEE Trans. VLSI Syst., 15 (3): 296-308 (2007)