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Verification of analog/mixed-signal circuits using labeled hybrid petri nets.

, , , , and . ICCAD, page 275-282. ACM, (2006)

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Automatic synthesis of gate-level timed circuits with choice., , and . ARVLSI, page 42-58. IEEE Computer Society, (1995)Interfacing synchronous and asynchronous modules within a high-speed pipeline., and . IEEE Trans. VLSI Syst., 8 (5): 573-583 (2000)Learning Genetic Regulatory Network Connectivity from Time Series Data., , and . IEA/AIE, volume 4031 of Lecture Notes in Computer Science, page 962-971. Springer, (2006)iSSA: An incremental stochastic simulation algorithm for genetic circuits., , and . ISCAS, page 553-556. IEEE, (2010)Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits., , and . ICCAD, page 424-432. IEEE Computer Society / ACM, (2003)Automatic abstraction for verification of cyber-physical systems., , , and . ICCPS, page 12-21. ACM, (2010)Poster Abstract: Methods and Tools for Verification of Cyber-Physical Systems., , , , and . ICCPS, page 232. IEEE Computer Society, (2012)iBioSim: a tool for the analysis and design of genetic circuits., , , , , and . Bioinformatics, 25 (21): 2848-2849 (2009)JSBML 1.0: providing a smorgasbord of options to encode systems biology models., , , , , , , , , and 12 other author(s). Bioinformatics, 31 (20): 3383-3386 (2015)Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 617-630 (2011)