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%0 Journal Article
%1 journals/tcad/LittleWMTBY11
%A Little, Scott
%A Walter, David
%A Myers, Chris J.
%A Thacker, Robert A.
%A Batchu, Satish
%A Yoneda, Tomohiro
%D 2011
%J IEEE Trans. on CAD of Integrated Circuits and Systems
%K dblp
%N 4
%P 617-630
%T Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets.
%U http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#LittleWMTBY11
%V 30
@article{journals/tcad/LittleWMTBY11,
added-at = {2019-06-02T00:00:00.000+0200},
author = {Little, Scott and Walter, David and Myers, Chris J. and Thacker, Robert A. and Batchu, Satish and Yoneda, Tomohiro},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2c9deb12338efe464be921f07e437d01d/dblp},
ee = {https://www.wikidata.org/entity/Q59859531},
interhash = {e6019d523b4e63af80caa16fd6e74b7e},
intrahash = {c9deb12338efe464be921f07e437d01d},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
keywords = {dblp},
number = 4,
pages = {617-630},
timestamp = {2019-09-27T08:26:42.000+0200},
title = {Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets.},
url = {http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#LittleWMTBY11},
volume = 30,
year = 2011
}
